Integrated circuit dies, or chips, are fabricated by the tens or hundreds on large semiconductor substrates. Once diced into discrete chips, they are encapsulated in individual packages that provide mechanical stability and protection from moisture and contamination. Conventional integrated circuit packages are made of ceramic materials such as alumina or plastic materials such as epoxy or silicone.
One method to increase the functionality and decrease the cost of integrated electronic devices is the integration of multiple integrated circuit dies in a common package. However, many suitable integrated circuit dies are only available pre-packaged in individual packages, and not directly from a diced or undiced wafer. In order to combine such components in a common package of minimum size, it is necessary to first remove the die from each pre-packaged component. Thus recovered, the bare dies may be combined together to provide enhanced functionality in a reduced volume.
Unfortunately, conventional methods of removing packaging from integrated circuit dies suffer from several problems. Conventional processes are often customized for each particular die, limiting throughput to one die at a time. Such processes include steps calibrated manually that are extremely time-consuming. Moreover, conventional processes often leave portions of wiring and/or ball bonds attached to the top surface of the die. Hence, to achieve a planar surface with such protrusions intact, a portion of the original package is necessarily preserved over the top surface of the die. Moreover, in order that the die not be damaged by mechanical package removal processes, a border of the package is also often left around the perimeter of the die, increasing its final cross-sectional area. These remaining portions of the package not only obscure the top surface of the die, preventing visual inspection, but can also flake off during subsequent processing and contaminate equipment.